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Writer's pictureiNARTE ASEAN

2022 2nd IEDS, Chengdu, P.R.C

Updated: Aug 21, 2022

The EOS/ESD Association, Inc. 2nd IEDS in Chengdu, P.R.C. from November 9~11, 2022.

EOS/ESD Association, Inc. is sponsoring the 2nd International EOS/ESD Symposium on Design and System (IEDS). IEDS 2022 is dedicated to the fundamental understanding of issues related to electrostatic discharge on design and system and the application of this knowledge to the solution of problems. The Technical Program Committee solicits symposium contributions, including data and analysis that advance the state-of-the-art knowledge, enhance or review the general knowledge, or discuss new topics related to on-chip ESD design, system ESD design, and EOS/ESD issues in manufacturing. The Technical Program Committee is inviting papers related, but not limited, to the following tracks:


  • Advanced CMOS EOS/ESD and Latch-up

  • ESD protection in Bipolar, RF, High-voltage, and BCD technologies

  • ESD modeling, simulation and design automation

  • EOS/ESD Failure analysis and case studies

  • ESD and latch-up testing

  • System ESD design and troubleshooting issues

  • ESD manufacturing control issues and target level discussion


Call for Papers Q1-2022

The EOS/ESD Association, Inc. is organizing the 2nd IEDS in Chengdu, P.R.C. from November 9~11, 2022.


EOS/ESD Association, Inc. is sponsoring the 2nd International EOS/ESD Symposium on Design and System (IEDS). IEDS 2022 is dedicated to the fundamental understanding of issues related to electrostatic discharge on design and system and the application of this knowledge to the solution of problems. The Technical Program Committee solicits symposium contributions, including data and analysis that advance the state-of-the-art knowledge, enhance or review the general knowledge, or discuss new topics related to on-chip ESD design, system ESD design, and EOS/ESD issues in manufacturing. The Technical Program Committee is inviting papers related, but not limited, to the following tracks:


  • Advanced CMOS EOS/ESD and Latch-up

  • ESD protection in Bipolar, RF, High-voltage, and BCD technologies

  • ESD modeling, simulation and design automation

  • EOS/ESD Failure analysis and case studies

  • ESD and latch-up testing

  • System ESD design and troubleshooting issues

  • ESD manufacturing control issues and target level discussion

Important Dates

April 01, 2022


April 22, 2022

Notification of Acceptance


July 11, 2022

Author Registration/Final Paper

Submission Deadline.


Submission Guidelines


Authors must submit a maximum 50-word abstract and 4-page maximum summary of their work. The summary must clearly state the purpose, results (e.g., data, diagrams, photographs, etc.), and conclusions of the work. Summaries must also include references to prior publications and state how the work enhances existing knowledge. Authors suggest the technical area related to their submission. Abstract submissions can be made electronically at:


Organizing Committee


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